1. Field of the Invention
The invention relates to a driving apparatus or the like of a display panel such as a plasma display panel (hereinbelow, abbreviated to “PDP”) including capacitive light emitting devices.
2. Description of the Related Art
Nowadays, a thin display apparatus using a flat display panel of a spontaneous light emitting type such as a PDP has been put into the market as what is called a wall-mounted television. As a display panel driving apparatus in the thin display apparatus using the PDP, for example, a technique as shown in Japanese Patent Kokai No. 2003-140602 (Patent Document 1) has been disclosed.
A schematic construction of the display panel driving apparatus disclosed in Patent Document 1 is shown in a block diagram of FIG. 1. In the diagram, a PDP 10 as a display panel has row electrodes X1 to Xn and row electrodes Y1 to Yn. A row electrode pair corresponding to each of the rows (the first row to the nth row) of one display screen is constructed by a pair of X electrode and Y electrode. Column electrodes Z1 to Zm corresponding to the columns (the first column to the mth column) of one display screen are further formed on the PDP 10 so as to perpendicularly cross the row electrode pairs and sandwich a dielectric layer and a discharge space layer (both are not shown). One discharging cell C(i, j) is formed in a crossing position of one row electrode pair (Xi, Yi) and one column electrode Zj. Each electrode of the PDP 10 is connected to a column electrode driving circuit 20 and a row electrode driving circuit 30 or 40. The electrode driving circuits are driven by a command from a drive control circuit 50.
The schematic operation of the display panel driving apparatus shown in FIG. 1 will now be described with reference to an operation time chart shown in FIG. 2.
First, the row electrode driving circuit 30 generates a reset pulse RPy of a positive voltage as shown in FIG. 2 and simultaneously applies it to each of the row electrodes Y1 to Yn. At the same time, the row electrode driving circuit 40 generates a reset pulse RPx of a negative voltage and simultaneously applies it to all of the row electrodes X1 to Xn. By simultaneously applying the reset pulses RPx and RPy, all discharging cells of the PDP 10 are discharge-excited and charged particles are generated. After termination of the discharge, a predetermined amount of wall charges are uniformly formed in the dielectric layer of all of the discharging cells. The processing step is called a resetting step.
After the end of the resetting step, the column electrode driving circuit 20 generates pixel data pulses DP1 to DPn according to pixel data corresponding to the first to nth rows of the display screen and sequentially applies the pixel data pulses to the column electrodes Z1 to Zm as shown in FIG. 2. The row electrode driving circuit 30 generates a scanning pulse SP of the negative voltage in accordance with the applying timing of each of the pixel data pulses DP1 to DPn and sequentially applies it to the row electrodes Y1 to Yn at the timing shown in FIG. 2.
Among the discharging cells belonging to the row electrode to which the scanning pulse SP has been applied, a discharge further occurs in the discharging cells to which the pixel data pulse DP of the positive voltage has simultaneously been applied and almost of the wall charges are lost. In the discharging cells to which the pixel data pulse DP of the positive voltage is not applied although the scanning pulse SP has been applied, since no discharge occurs, the wall charges remain. In this instance, the discharging cells in which the wall charges remain become the light-emission discharging cells. The discharging cells in which the wall charges have been extinguished become the non-light-emission discharging cells. The processing step is called an addressing step.
After the end of the addressing step, the row electrode driving circuit 30 continuously supplies a sustaining pulse IPy of the positive voltage as shown in FIG. 2 to each of the row electrodes Y1 to Yn. At the same time, the row electrode driving circuit 40 continuously supplies a sustaining pulse IPx of the positive voltage to each of the row electrodes X1 to Xn at the timing having a predetermined phase difference from the applying timing of the sustaining pulse IPy. For a period of time during which the sustaining pulses IPx and IPy are alternately applied, the light-emission discharging cells in which the wall charges remain repeat the discharge light emission and maintain the light-emitting state. The processing step is called a sustaining step.
The series of processing steps described above is repeated every subfield of a display video image in the display panel driving apparatus of FIG. 1.
On the basis of a sync timing signal included in a video signal supplied to the apparatus, the drive control circuit 50 in FIG. 1 generates various switching signals to form various driving pulses as shown in FIG. 2. The switching signals are supplied to each of the column electrode driving circuit 20 and the row electrode driving circuits 30 and 40. That is, each of the column electrode driving circuit 20 and the row electrode driving circuits 30 and 40 generates various driving pulses shown in FIG. 2 in response to the switching signals supplied from the drive control circuit 50.
A pulse generating circuit to generate the various driving pulses such as reset pulse RPy and sustaining pulses IPx and IPy is provided in each of the electrode driving circuits described above for every electrode of each row and each column. Each of the pulse generating circuits generates the various driving pulses by using charge/discharge of a capacitor by an LC resonance circuit comprising an inductor L and a capacitor C.
That is, by paying attention to a fact that the discharging cell C(i, j) formed on the PDP 10 is a capacitive load, a resonance circuit is formed by combining the inductor as an inductive device and the capacitor for collecting an electric power. A switching device such as an FET is turned on/off in response to the switching signals supplied from the drive control circuit 50 and the resonance circuit is excited at predetermined timing, thereby generating a desired driving pulse.
An example of the pulse generating circuits is shown in FIG. 3. The operation of the circuit shown in the diagram will be simply explained as follows.
First, when a switch S2 is turned on by a predetermined switching signal supplied from the drive control circuit 50, a capacitor C0 for collecting the electric power is connected to a panel capacitor Cp of the discharging cell C(i, j) through a diode D1 and an inductor L1. The capacitor Cp is, consequently, charged by the charges accumulated in the capacitor C0 and a charging current flows in the inductor L1. After that, a predetermined processing operation is executed and, subsequently, a switch S3 is turned on in place of the switch S2. C0 and Cp are, thus, connected through a diode D2 and an inductor L2 and a discharge current from Cp to C0 flows in L2. By repetitively executing the processes at predetermined timing, the discharging cell C(i, j) is driven.
In the conventional pulse generating circuit as described above, since the discharging cell is excited by using the resonance circuit comprising the inductor and the capacitor, the voltage/current of the charge/discharge of the panel capacitor Cp has a sine wave. When the capacitive load such as a PDP is driven, it is generally necessary to apply a relatively high voltage of tens to hundred and tens of volts in order to cause the discharge in the discharging cell C(i, j) and, naturally, a peak value (maximum value) of the charge/discharge voltage of the sine wave also rises. Since a withstanding voltage of each section such as display panel or pulse generating circuit needs to be determined on the basis of the peak value as a reference instead of an effective value of the driving voltage, the increase in peak value becomes a factor of an enlargement in size of the display panel or pulse generating circuit. Naturally, since a peak value of the charge/discharge current of the sine wave also similarly rises, an electric power loss due to a resistance component of each electrode arranged on the display panel or the inductors, diodes, etc. included in the pulse generating circuit increases, so that there is also a problem of deterioration of power collecting efficiency in the display panel apparatus.